ICs have their hardware 'configuration' effectively in the metal layers, which are not so susceptible. The configuration is the biggest concern, as this is essentially the processor (or whatever the circuit is) itself. RAM used by a processor is also at risk, but this is easier to handle. From what I'm told, a reasonably large feature size ASIC can have far fewer problems than a modern FPGA.
Also, note that the Spartan 3AN does not seem to use flash for configuration. It looks like the internal flash is just for storage and the configuration is copied into RAM, as with normal Spartan devices. This means one less chip on the board and potentially better security, but no real advantage for avoiding SEUs.
Also, note that the Spartan 3AN does not seem to use flash for configuration. It looks like the internal flash is just for storage and the configuration is copied into RAM, as with normal Spartan devices. This means one less chip on the board and potentially better security, but no real advantage for avoiding SEUs.