I'm not sure if it's a bug in this case, but I've used logic simulation software with the same issue and it was considered a "feature". Basically, unconnected nodes of an or-gate are considered HIGH. I suppose it makes more sense when the AND-gate has more inputs.

Confused the hell out of me at the time, especially since I had left the assignment to the last possible minute.

Edit: remembered the name of the software: http://ozark.hendrix.edu/~burch/logisim/

No, that still doesn't make sense to me. The behavior of a logic circuit with unconnected inputs depends on the implementation; in typical CMOS, those floating inputs can do things as wacky as picking up the electrical fields of nearby people. The proper thing to do with floating inputs is to declare them unknown, and for any logic operation which depends on their values to also be unknown. Most logic simulation software I've used or written has worked this way.

Makes sense. I'll keep that in mind if I make further updates to the simulator.

Thanks. Now I feel justified in thinking it was a dumb "feature" at the time. :)